1. Field of the Invention
The present invention relates to a radio frequency (hereinafter, referred to as simply "RF") power amplifier for obtaining RF power using a semiconductor device, which is mainly used for a transmitting circuit section of a communication apparatus and the like utilizing a microwave band.
2. Description of the Related Art
Since various types of communication systems such as a portable telephone are widely used these days, there is an increasing demand for an RF power amplifier in a microwave band. With such a demand, the RF power amplifier is required to operate at a low voltage with high efficiency and to be miniaturized and lightened. Therefore, a GaAs device, which is: suitable for highly efficient low voltage operation as compared with a silicon device, is likely to be used in an RF power amplifier.
Concerning the circuit design of the RF power amplifier, the following has been reported. When an output circuit of a switching device such as a transistor included therein is designed in view not only of a frequency of a fundamental wave (hereinafter, referred to as the fundamental wave frequency) but also of harmonic wave components, the RF power amplifier operates with higher efficiency as compared with the case where the output circuit is designed in view of the fundamental wave frequency alone. For example, "A Theoretical Analysis and Experimental Confirmation of the Optimally Loaded and Overdriven RF Power Amplifier" written by David M. Snider, IEEE Trans. on Electron Devices, Vol. ED-14, No. 12, pp. 851-857 (December 1967), describes the realization of the optimum efficiency conditions that impedances are made 0 for harmonic wave components having a frequency obtained by multiplying the fundamental wave frequency by an even number in addition to obtaining the impedance matching at the fundamental wave frequency, at an output end of a transistor included in an RF power amplifier. Japanese Laid-Open Patent Publication Nos. 58-159002 and 62-114310 each discloses a specific circuit configuration for satisfying the above optimum efficiency conditions. Furthermore, "UHF Band Low-Voltage High-efficiency FET Amplifier" written by Nakayama et al., Technical Report of IEICE., ED93-170, MW93-127, ICD93-185 (1994-01) reports that a two-stage RF power amplifier using GaAsFET, as an example of a specific circuit configuration as described above, exhibits an output power of 31 dBm and an efficiency of 61.5% at a frequency of 935 MHz and a drain voltage of 3.3 V.
Hereinafter, a conventional power amplifier for radio frequency disclosed in Japanese Laid-Open Patent Publication No. 58-159002 will be described, referring to the drawings.
FIG. 1 is a circuit diagram of a conventional RF power amplifier 50. The RF power amplifier 50, formed on a substrate having a predetermined value of a relative dielectric constant .epsilon..gamma., includes a power field-effect transistor (hereinafter referred to as "FET") 60, an input impedance matching circuit 70 connected to an input side of the FET 60 and an output impedance matching circuit 80 connected to an output side of the FET 60. The input impedance matching circuit 70 matches the impedance of an external circuit connected to an input-side RF terminal 5 to the internal impedance of the FET 60. Similarly, the output impedance matching circuit 80 matches the impedance of the external circuit connected to an output-side RF terminal 14 to the internal impedance of the FET 60.
In the input impedance matching circuit 70, a gate 9 of the FET 60 is connected to the input-side RF terminal 5 via an input-side PC blocking capacitor 6 and an input-side matching line 7. The input-side matching line 7 is connected to a gate bias voltage supplying terminal 1 via a resistance 3 and is grounded via an input-side matching capacitor 8.
On the other hand, in the output impedance matching circuit 80, a drain 11 of the FET 60 is connected to an output-side RF terminal 14 via an output-side DC blocking capacitor 13 and an output-side matching line 12. The output-side matching line 12 is connected to a drain bias voltage supplying terminal 2 via a choke coil 4, and is grounded via an output-side matching capacitor 15. Furthermore, a first line 16 and a first capacitor 17 are connected in series between a point A of the line connected to the drain 11 of the FET 60 and the ground level.
A source 10 of the FET 60 is directly grounded.
In the above-mentioned configuration, the input impedance matching circuit 70 is designed so as to achieve the matching of input impedance at the fundamental wave frequency by adjusting the length of the input-side matching line 7 and the capacitance of the input-side matching capacitor 8. Similarly, the output impedance matching circuit 80 is designed so as to achieve the matching of output impedance at the fundamental wave frequency by adjusting the length of the output-side matching line 12 and the capacitance of the output-side matching capacitor 15.
Hereinafter, an input impedance for the fundamental wave frequency f, viewed from the point B in FIG. 1, is referred to as Zin(f), and an output impedance for the fundamental wave frequency, viewed from the point A, is referred to as Zout(f).
A length La of the first line 16 connected to the point A is designed so that an electric length thereof is equal to one-fourth of a wavelength for the fundamental wave frequency f. As a result, the impedance becomes infinite for the fundamental wave when the first line 16 is viewed from the point A. On the other hand, the length La thus designed corresponds to half of a wavelength of the secondary harmonic wave which has a twice frequency 2f and a half wavelength to those of the fundamental wave. Therefore, the impedance becomes 0 for the secondary harmonic wave when the first line 16 is viewed from the point A.
In this way, a circuit 31 including the first line 16 and the first capacitor 17 can independently control the output impedance Zout(2f) for the secondary harmonic wave without affecting the output impedance Zout(f) for the fundamental wave. Therefore, the circuit 31 functions as the output impedance control circuit for the secondary harmonic wave. Hereinafter, the circuit 31 is referred to as a Zout(2f) control circuit 31.
In the RF power amplifier, when the FET 60 to be used is specified, the optimum values of the respective impedances Zin(f), Zout(f) and Zout(2f) required for maximizing the operational efficiency are generally obtained in a unique way.
As described above, a conventional RF power amplifier 50, in which only the output impedance Zout(2f) for the secondary harmonic wave is controlled using the Zout(2f) control circuit 31, exhibits a total efficiency of 61.5% under a low-voltage (3.3 V) operating condition in a two-stage structure using a GaAsFET. It is difficult to realize an amplifier with high efficiency under the condition where a drain voltage is low. Accordingly, the aforementioned total efficiency of 61.5% under 3.3 V operating condition is substantially the maximum value for a conventional RF amplifier using a GaAs FET. Thus, it is difficult to provide the amplifier with higher efficiency with the conventional configuration.